diff --git a/F28335/DSP2833x_ECan.c b/F28335/DSP2833x_ECan.c
index 35971c4..c078c24 100644
--- a/F28335/DSP2833x_ECan.c
+++ b/F28335/DSP2833x_ECan.c
@@ -365,29 +365,29 @@ InitECanaGpio(void)
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
//
- GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pull-up for GPIO30 (CANRXA)
- //GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pull-up for GPIO18 (CANRXA)
+ // GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pull-up for GPIO30 (CANRXA)
+ GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pull-up for GPIO18 (CANRXA)
- GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; //Enable pull-up for GPIO31 (CANTXA)
- //GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; //Enable pull-up for GPIO19 (CANTXA)
+ // GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; //Enable pull-up for GPIO31 (CANTXA)
+ GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; //Enable pull-up for GPIO19 (CANTXA)
//
// Set qualification for selected CAN pins to asynch only
// Inputs are synchronized to SYSCLKOUT by default.
// This will select asynch (no qualification) for the selected pins.
//
- GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3; // Asynch qual for GPIO30 (CANRXA)
- //GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch qual for GPIO18 (CANRXA)
+ // GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3; // Asynch qual for GPIO30 (CANRXA)
+ GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch qual for GPIO18 (CANRXA)
//
// Configure eCAN-A pins using GPIO regs
// This specifies which of the possible GPIO pins will be eCAN functional
// pins.
//
- GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // Configure GPIO30 for CANRXA
- //GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // Configure GPIO18 for CANRXA
- GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // Configure GPIO31 for CANTXA
- //GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3; // Configure GPIO19 for CANTXA
+ // GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // Configure GPIO30 for CANRXA
+ GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // Configure GPIO18 for CANRXA
+ // GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // Configure GPIO31 for CANTXA
+ GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3; // Configure GPIO19 for CANTXA
EDIS;
}
diff --git a/Protocol/CAN.h b/Protocol/CAN.h
index e37fb78..328350f 100644
--- a/Protocol/CAN.h
+++ b/Protocol/CAN.h
@@ -6,7 +6,6 @@
namespace canSpace {
enum CAN_VARIANT{
- NONE = 0,
CANA,
CANB
};
@@ -24,11 +23,7 @@ union MsgCtrlReg {
Uint16 all;
struct MsgCtrlBits bit;
- MsgCtrlReg(){
- all = 0;
- }
-
- MsgCtrlReg(Uint16 configData){
+ MsgCtrlReg(Uint16 configData = 0){
all = configData;
}
};
@@ -43,34 +38,53 @@ struct MsgID_Bits { // bits description
};
// Allow access to the bit fields or entire register
-union ConfigMsgID {
+union MsgID {
Uint32 all;
struct MsgID_Bits bit;
- ConfigMsgID(bool isExtendedID, Uint16 standartID, Uint32 extendedID, bool isAAM, bool isAME)
- {
+ MsgID(Uint32 boxID = 0xAAA, bool isExtendedID = false, bool isAAM = false, bool isAME = false) {
if(!isExtendedID){
+ bit.STDMSGID = boxID;
bit.EXTMSGID_H = 0;
bit.EXTMSGID_L = 0;
- bit.STDMSGID = standartID;
}
- else{ all = extendedID; }
+ else{ all = boxID; }
+ bit.IDE = isExtendedID;
bit.AAM = isAAM;
bit.AME = isAME;
- bit.IDE = isExtendedID;
+ }
+
+ MsgID(const MsgID& init) {
+ all = init.all;
}
};
-struct ConfigMBox{
- ConfigMsgID msgID;
+/* struct ConfigMsgIDReg{
+ Uint32 boxID;
+ bool isExtendedID;
+ bool isAAM;
+ bool isAME;
+
+ ConfigMsgIDReg(Uint32 initBoxID = 0xAAA, bool initIsExtendedID = false, bool initIsAAM = false, bool initIsAME = false) :
+ boxID(initBoxID),
+ isExtendedID(initIsExtendedID),
+ isAAM(initIsAAM),
+ isAME(initIsAME)
+ {}
+}; */
+
+
+/* struct ConfigMBox{
+ MsgID msgID;
MsgCtrlReg msgCtrlReg;
- ConfigMBox(bool isExtendedID, Uint16 standartID, Uint32 extendedID, bool isAAM, bool isAME, Uint16 ctrlReg) :
- msgID(isExtendedID, standartID, extendedID, isAAM, isAME),
- msgCtrlReg(ctrlReg)
+ ConfigMBox(const MsgID& configMsgID, const Uint16& configMsgCtrlReg) :
+ // msgID(configMsgID.boxID, configMsgID.isExtendedID, configMsgID.isAAM, configMsgID.isAME),
+ msgID(configMsgID),
+ msgCtrlReg(configMsgCtrlReg)
{}
-};
+}; */
struct CANMessage {
union MsgCtrlReg msgctrl;
@@ -78,28 +92,20 @@ struct CANMessage {
union CANMDH_REG mdh;
CANMessage(){
- msgctrl.all = 0;
mdl.all = 0;
mdh.all = 0;
}
-
- // CANMessage(const CANMessage& copyStruct){
- // msgctrl.all = copyStruct.msgctrl.all;
- // mdl.all = copyStruct.mdl.all;
- // mdh.all = copyStruct.mdh.all;
- // }
};
class CAN{
public:
- CAN();
+ CAN(CAN_VARIANT canVariant);
- void initGpio(CAN_VARIANT canVarinat);
- void config(CAN_VARIANT canVarinat, Uint16 baudrate);
- // void configRxMBoxes();
- void configRxMBoxes(Uint16 boxNumber, const ConfigMBox& configData);
- // void configTxMBoxes(); //TODO delete
- void configTxMBox(Uint16 boxNumber, const ConfigMBox& configData);
+ void initGpio();
+ void config(Uint16 baudrate);
+ // void configTxMBox(Uint16 boxNumber, const ConfigMBox& configData);
+ void configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg);
+ void configRxMBoxes(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg);
void transmitMsg(Uint16 boxNumber, const CANMessage& message);
bool receiveMsg(Uint16 boxNumber, CANMessage& rxMessage);
@@ -111,6 +117,7 @@ private:
volatile ECAN_REGS* p_CanRegs_;
ECAN_REGS CanShadow_;
volatile ECAN_MBOXES* p_CanMBoxes_;
+ CAN_VARIANT canPort;
};
diff --git a/Protocol/CANConfig.cpp b/Protocol/CANConfig.cpp
index cc97086..a3a8aa2 100644
--- a/Protocol/CANConfig.cpp
+++ b/Protocol/CANConfig.cpp
@@ -4,24 +4,24 @@
namespace canSpace {
-CAN::CAN(){
- // TODO Make it impossible to create 2 CANA/CANB objects. Give CANA/CANB as a constructor parameter
-}
+CAN::CAN(CAN_VARIANT canVariant) :
+ canPort(canVariant)
+{}
-void CAN::initGpio(CAN_VARIANT canVarinat){
- if(canVarinat == CANA) InitECanaGpio();
- else if (canVarinat == CANB) InitECanbGpio();
+void CAN::initGpio(){
+ if(canPort == CANA) InitECanaGpio();
+ else if (canPort == CANB) InitECanbGpio();
}
-void CAN::config(CAN_VARIANT canVarinat, Uint16 baudrate){
- if (canVarinat == CANA){
+void CAN::config(Uint16 baudrate){
+ if (canPort == CANA){
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ECANAENCLK = 1;
EDIS;
p_CanRegs_ = &ECanaRegs;
p_CanMBoxes_ = &ECanaMboxes;
}
- else if (canVarinat == CANB){
+ else if (canPort == CANB){
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ECANBENCLK = 1;
EDIS;
@@ -172,33 +172,15 @@ void CAN::config(CAN_VARIANT canVarinat, Uint16 baudrate){
// Debug feature
// Configure the eCAN for self test mode.
//
- CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
- CanShadow_.CANMC.bit.STM = 1; // Configure CAN for self-test mode
- p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
+ // CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
+ // CanShadow_.CANMC.bit.STM = 1; // Configure CAN for self-test mode
+ // p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
EDIS;
}
-// void CAN::configTxMBoxes(){
-
-// // Write to the MSGID field
-// p_CanMBoxes_->MBOX1.MSGID.all = 0x0; // IDE-0, AME-0, AAM-0
-// p_CanMBoxes_->MBOX1.MSGID.bit.STDMSGID = 0xAAA;
-
-// p_CanMBoxes_->MBOX1.MSGCTRL.bit.DLC = 8; // Data length in bytes (0-8)
-// p_CanMBoxes_->MBOX1.MSGCTRL.bit.RTR = 0; // Remote Transmission Request
-
-// CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
-// CanShadow_.CANMD.bit.MD1 = 0; // Mailbox direction - transmit
-// p_CanRegs_->CANMD.all = CanShadow_.CANMD.all;
-
-// CanShadow_.CANME.all = p_CanRegs_->CANME.all;
-// CanShadow_.CANME.bit.ME1 = 1;
-// p_CanRegs_->CANME.all = CanShadow_.CANME.all;
-// } // TODO delete
-
-void CAN::configTxMBox(Uint16 boxNumber, const ConfigMBox& configData){
+void CAN::configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg){
volatile MBOX* p_MailBox(NULL);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
@@ -219,7 +201,7 @@ void CAN::configTxMBox(Uint16 boxNumber, const ConfigMBox& configData){
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
// Write to the MSGID field
- p_MailBox->MSGID.all = configData.msgID.all;
+ p_MailBox->MSGID.all = configID.all;
// Mailbox direction - transmit
CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
@@ -227,7 +209,7 @@ void CAN::configTxMBox(Uint16 boxNumber, const ConfigMBox& configData){
p_CanRegs_->CANMD.all = CanShadow_.CANMD.all;
// Write to RTR and TPL field in control reg
- p_MailBox->MSGCTRL.bit.RTR = configData.msgCtrlReg.bit.RTR;
+ p_MailBox->MSGCTRL.bit.RTR = configCtrlReg.bit.RTR;
// p_MailBox->MSGCTRL.bit.TPL = configData.msgCtrlReg.bit.TPL; // enable if you need to set msg priority lvl
// Mailbox enable
@@ -236,40 +218,8 @@ void CAN::configTxMBox(Uint16 boxNumber, const ConfigMBox& configData){
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
}
-// void CAN::configRxMBoxes(){ // TODO make this method with parameters
-
-// // Write to the MSGID field
-// p_CanMBoxes_->MBOX25.MSGID.all = 0x0;
-// p_CanMBoxes_->MBOX25.MSGID.bit.STDMSGID = 0xAAA;
-
-// // Write to DLC field in Master Control reg
-// p_CanMBoxes_->MBOX25.MSGCTRL.bit.DLC = 8;
-// p_CanMBoxes_->MBOX25.MSGCTRL.bit.RTR = 0;
-
-// //
-// // Configure Mailbox under test as a Receive mailbox
-// //
-// CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
-// CanShadow_.CANMD.bit.MD25 = 1;
-// p_CanRegs_->CANMD.all = CanShadow_.CANMD.all;
-
-// // Overwrite protection
-// // CanShadow_.CANOPC.all = p_CanRegs_->CANOPC.all;
-// // CanShadow_.CANOPC.bit.OPC1 = 1; // Should be one more mailbox to store 'overflow' messages
-// // p_CanRegs_->CANOPC.all = CanShadow_.CANOPC.all;
-
-// // Enable Mailbox
-// CanShadow_.CANME.all = p_CanRegs_->CANME.all;
-// CanShadow_.CANME.bit.ME25 = 1;
-// p_CanRegs_->CANME.all = CanShadow_.CANME.all;
-
-// // Write to the mailbox RAM field
-// p_CanMBoxes_->MBOX25.MDL.all = 0x55555555;
-// p_CanMBoxes_->MBOX25.MDH.all = 0x55555555;
-// }
-
-void CAN::configRxMBoxes(Uint16 boxNumber, const ConfigMBox& configData){
+void CAN::configRxMBoxes(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg){
volatile MBOX* p_MailBox(NULL);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
@@ -279,11 +229,11 @@ void CAN::configRxMBoxes(Uint16 boxNumber, const ConfigMBox& configData){
// Write to the MSGID field
p_MailBox->MSGID.all = 0x0;
- p_MailBox->MSGID.all = configData.msgID.all;
+ p_MailBox->MSGID.all = configID.all;
// Write to DLC and RTR field in control reg
- p_MailBox->MSGCTRL.bit.DLC = configData.msgCtrlReg.bit.DLC;
- p_MailBox->MSGCTRL.bit.RTR = configData.msgCtrlReg.bit.RTR;
+ p_MailBox->MSGCTRL.bit.DLC = configCtrlReg.bit.DLC;
+ p_MailBox->MSGCTRL.bit.RTR = configCtrlReg.bit.RTR;
// Configure Mailbox under test as a Receive mailbox
CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
diff --git a/main.cpp b/main.cpp
index 7559fce..7336abb 100644
--- a/main.cpp
+++ b/main.cpp
@@ -14,7 +14,7 @@ void idle_loop(void);
interrupt void cpu_timer0_isr(void);
//interrupt void adc_isr(void);
-canSpace::CAN canTest;
+canSpace::CAN canTest(canSpace::CANB);
Uint16 msgsSent = 0;
Uint16 infCounter = 0;
volatile Uint16 testCounter = 0;
@@ -78,11 +78,10 @@ void main()
// core.cpu_timers.start();
//
- canTest.initGpio(canSpace::CANB);
- canTest.config(canSpace::CANB, 100);
- // canTest.configTxMBoxes();
- canTest.configTxMBox(1, canSpace::ConfigMBox(false, 0xAAA, 0x0, false, false, 0xF));
- canTest.configRxMBoxes(25, canSpace::ConfigMBox(false, 0xAAA, 0x0, false, false, 0xF));
+ canTest.initGpio();
+ canTest.config(100);
+ canTest.configTxMBox(1, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8));
+ canTest.configRxMBoxes(25, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8));
// InitECanGpio();
// InitECan();
diff --git a/targetConfigs/MASTER_RED.ccxml b/targetConfigs/MASTER_RED.ccxml
new file mode 100644
index 0000000..c0d6486
--- /dev/null
+++ b/targetConfigs/MASTER_RED.ccxml
@@ -0,0 +1,28 @@
+
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diff --git a/targetConfigs/SLAVE_BLACK.ccxml b/targetConfigs/SLAVE_BLACK.ccxml
new file mode 100644
index 0000000..8dc6b6b
--- /dev/null
+++ b/targetConfigs/SLAVE_BLACK.ccxml
@@ -0,0 +1,28 @@
+
+
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