Change configuration settings
1. Rename the project 2. Renew system headers and .c files from C2000 3. Update include optionsdev
Oleg
2 weeks ago
parent
f7e8138476
commit
18728c7fbc
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;// TI File $Revision: /main/3 $
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;// Checkin $Date: June 26, 2007 16:41:07 $
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;//###########################################################################
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;//
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;// FILE: DSP2833x_CSMPasswords.asm
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;//
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;// TITLE: DSP2833x Code Security Module Passwords.
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;//
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;// DESCRIPTION:
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;//
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;// This file is used to specify password values to
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;// program into the CSM password locations in Flash
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;// at 0x33FFF8 - 0x33FFFF.
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;//
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;// In addition, the reserved locations 0x33FF80 - 0X33fff5 are
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;// all programmed to 0x0000
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;//
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;//###########################################################################
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;// $TI Release: 2833x/2823x Header Files V1.32 $
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;// $Release Date: June 28, 2010 $
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;// $Copyright:
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;// Copyright (C) 2009-2024 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;// $
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;//###########################################################################
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; The "csmpasswords" section contains the actual CSM passwords that will be
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; linked and programmed into to the CSM password locations (PWL) in flash.
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; These passwords must be known in order to unlock the CSM module.
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; All 0xFFFF's (erased) is the default value for the password locations (PWL).
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; It is recommended that all passwords be left as 0xFFFF during code
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; development. Passwords of 0xFFFF do not activate code security and dummy
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; reads of the CSM PWL registers is all that is required to unlock the CSM.
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; When code development is complete, modify the passwords to activate the
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; code security module.
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.sect "csmpasswds"
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.int 0xFFFF ;PWL0 (LSW of 128-bit password)
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.int 0xFFFF ;PWL1
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.int 0xFFFF ;PWL2
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.int 0xFFFF ;PWL3
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.int 0xFFFF ;PWL4
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.int 0xFFFF ;PWL5
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.int 0xFFFF ;PWL6
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.int 0xFFFF ;PWL7 (MSW of 128-bit password)
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;----------------------------------------------------------------------
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; For code security operation, all addresses between 0x33FF80 and
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; 0X33fff5 cannot be used as program code or data. These locations
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; must be programmed to 0x0000 when the code security password locations
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; (PWL) are programmed. If security is not a concern, then these addresses
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; can be used for code or data.
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; The section "csm_rsvd" can be used to program these locations to 0x0000.
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.sect "csm_rsvd"
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.loop (33FFF5h - 33FF80h + 1)
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.int 0x0000
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.endloop
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;//===========================================================================
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;// End of file.
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;//===========================================================================
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;// TI File $Revision: /main/1 $
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;// Checkin $Date: August 18, 2006 13:46:03 $
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;//###########################################################################
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;//
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;// FILE: DSP2833x_DBGIER.asm
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;//
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;// TITLE: Set the DBGIER register
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;//
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;// DESCRIPTION:
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;//
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;// Function to set the DBGIER register (for realtime emulation).
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;// Function Prototype: void SetDBGIER(Uint16)
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;// Useage: SetDBGIER(value);
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;// Input Parameters: Uint16 value = value to put in DBGIER register.
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;// Return Value: none
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;//
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;//###########################################################################
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;// $TI Release: 2833x/2823x Header Files V1.32 $
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;// $Release Date: June 28, 2010 $
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;// $Copyright:
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;// Copyright (C) 2009-2024 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;// $
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;//###########################################################################
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.global _SetDBGIER
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.text
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_SetDBGIER:
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MOV *SP++,AL
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POP DBGIER
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LRETR
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;// TI File $Revision: /main/1 $
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;// Checkin $Date: August 18, 2006 13:46:09 $
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;//###########################################################################
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;//
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;// FILE: DSP2833x_DisInt.asm
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;//
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;// TITLE: Disable and Restore INTM and DBGM
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;//
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;// Function Prototypes:
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;//
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;// Uint16 DSP28x_DisableInt();
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;// and void DSP28x_RestoreInt(Uint16 Stat0);
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;//
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;// Usage:
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;//
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;// DSP28x_DisableInt() sets both the INTM and DBGM
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;// bits to disable maskable interrupts. Before doing
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;// this, the current value of ST1 is stored on the stack
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;// so that the values can be restored later. The value
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;// of ST1 before the masks are set is returned to the
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;// user in AL. This is then used to restore their state
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;// via the DSP28x_RestoreInt(Uint16 ST1) function.
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;//
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;// Example
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;//
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;// Uint16 StatusReg1
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;// StatusReg1 = DSP28x_DisableInt();
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;//
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;// ... May also want to disable INTM here
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;//
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;// ... code here
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;//
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;// DSP28x_RestoreInt(StatusReg1);
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;//
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;// ... Restore INTM enable
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;//
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;//###########################################################################
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;// $TI Release: 2833x/2823x Header Files V1.32 $
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;// $Release Date: June 28, 2010 $
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;// $Copyright:
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;// Copyright (C) 2009-2024 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;// $
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;//###########################################################################
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.def _DSP28x_DisableInt
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.def _DSP28x_RestoreInt
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_DSP28x_DisableInt:
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PUSH ST1
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SETC INTM,DBGM
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MOV AL, *--SP
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LRETR
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_DSP28x_RestoreInt:
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MOV *SP++, AL
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POP ST1
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LRETR
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;//===========================================================================
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;// End of file.
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;//===========================================================================
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@ -0,0 +1,552 @@
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// TI File $Revision: /main/16 $
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// Checkin $Date: October 3, 2007 14:50:19 $
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//###########################################################################
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//
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// FILE: DSP2833x_McBSP.c
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//
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// TITLE: DSP2833x Device McBSP Initialization & Support Functions.
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//
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//###########################################################################
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// $TI Release: 2833x/2823x Header Files V1.32 $
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// $Release Date: June 28, 2010 $
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// $Copyright:
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// Copyright (C) 2009-2024 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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//
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// Included Files
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//
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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
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#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
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//
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// MCBSP_INIT_DELAY determines the amount of CPU cycles in the 2 sample rate
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// generator (SRG) cycles required for the Mcbsp initialization routine.
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// MCBSP_CLKG_DELAY determines the amount of CPU cycles in the 2 clock
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// generator (CLKG) cycles required for the Mcbsp initialization routine.
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// For the functions defined in Mcbsp.c, MCBSP_INIT_DELAY and MCBSP_CLKG_DELAY
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// are based off of either a 150 MHz SYSCLKOUT (default) or a 100 MHz SYSCLKOUT
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//
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//
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// CPU_FRQ_100MHZ and CPU_FRQ_150MHZ are defined in DSP2833x_Examples.h
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//
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//
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// For 150 MHz SYSCLKOUT(default)
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//
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#if CPU_FRQ_150MHZ
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#define CPU_SPD 150E6
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//
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// SRG input is LSPCLK (SYSCLKOUT/4) for examples
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//
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#define MCBSP_SRG_FREQ CPU_SPD/4
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#endif
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//
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// For 100 MHz SYSCLKOUT
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//
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#if CPU_FRQ_100MHZ
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#define CPU_SPD 100E6
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//
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// SRG input is LSPCLK (SYSCLKOUT/4) for examples
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//
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#define MCBSP_SRG_FREQ CPU_SPD/4
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#endif
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#define CLKGDV_VAL 1
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//
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// # of CPU cycles in 2 SRG cycles-init delay
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//
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#define MCBSP_INIT_DELAY 2*(CPU_SPD/MCBSP_SRG_FREQ)
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//
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// # of CPU cycles in 2 CLKG cycles-init delay
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//
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#define MCBSP_CLKG_DELAY 2*(CPU_SPD/(MCBSP_SRG_FREQ/(1+CLKGDV_VAL)))
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//
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// Function Prototypes
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//
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void delay_loop(void); // Delay function used for SRG initialization
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void clkg_delay_loop(void); // Delay function used for CLKG initialization
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//
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// InitMcbsp - This function initializes the McBSP to a known state.
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//
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void InitMcbsp(void)
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{
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InitMcbspa();
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#if DSP28_MCBSPB
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InitMcbspb();
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#endif // end DSP28_MCBSPB
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}
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//
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// InitMcbspa - This function initializes McBSPa to a known state.
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//
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void
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InitMcbspa(void)
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|
{
|
||||||
|
//
|
||||||
|
// McBSP-A register settings
|
||||||
|
//
|
||||||
|
|
||||||
|
//
|
||||||
|
// Reset FS generator, sample rate generator & transmitter
|
||||||
|
//
|
||||||
|
McbspaRegs.SPCR2.all=0x0000;
|
||||||
|
|
||||||
|
McbspaRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable loopback mode for test.
|
||||||
|
// Comment out for normal McBSP transfer mode.
|
||||||
|
//
|
||||||
|
McbspaRegs.SPCR1.bit.DLB = 1;
|
||||||
|
|
||||||
|
McbspaRegs.MFFINT.all=0x0; // Disable all interrupts
|
||||||
|
|
||||||
|
//
|
||||||
|
// Single-phase frame, 1 word/frame, No companding (Receive)
|
||||||
|
//
|
||||||
|
McbspaRegs.RCR2.all=0x0;
|
||||||
|
McbspaRegs.RCR1.all=0x0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Single-phase frame, 1 word/frame, No companding (Transmit)
|
||||||
|
//
|
||||||
|
McbspaRegs.XCR2.all=0x0;
|
||||||
|
McbspaRegs.XCR1.all=0x0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// FSX generated internally, FSR derived from an external source
|
||||||
|
//
|
||||||
|
McbspaRegs.PCR.bit.FSXM = 1;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKX generated internally, CLKR derived from an external source
|
||||||
|
//
|
||||||
|
McbspaRegs.PCR.bit.CLKXM = 1;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
|
||||||
|
//
|
||||||
|
McbspaRegs.SRGR2.bit.CLKSM = 1;
|
||||||
|
|
||||||
|
McbspaRegs.SRGR2.bit.FPER = 31; // FPER = 32 CLKG periods
|
||||||
|
|
||||||
|
McbspaRegs.SRGR1.bit.FWID = 0; // Frame Width = 1 CLKG period
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKG frequency = LSPCLK/(CLKGDV+1)
|
||||||
|
//
|
||||||
|
McbspaRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL;
|
||||||
|
|
||||||
|
delay_loop(); // Wait at least 2 SRG clock cycles
|
||||||
|
|
||||||
|
McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
|
||||||
|
clkg_delay_loop(); // Wait at least 2 CLKG cycles
|
||||||
|
McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
|
||||||
|
McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
|
||||||
|
McbspaRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb - This function initializes McBSPb to a known state.
|
||||||
|
//
|
||||||
|
#if (DSP28_MCBSPB)
|
||||||
|
void
|
||||||
|
InitMcbspb(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// McBSP-B register settings
|
||||||
|
//
|
||||||
|
|
||||||
|
//
|
||||||
|
// Reset FS generator, sample rate generator & transmitter
|
||||||
|
//
|
||||||
|
McbspbRegs.SPCR2.all=0x0000;
|
||||||
|
|
||||||
|
McbspbRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable loopback mode for test.
|
||||||
|
// Comment out for normal McBSP transfer mode.
|
||||||
|
//
|
||||||
|
McbspbRegs.SPCR1.bit.DLB = 1;
|
||||||
|
|
||||||
|
McbspbRegs.MFFINT.all=0x0; // Disable all interrupts
|
||||||
|
|
||||||
|
//
|
||||||
|
// Single-phase frame, 1 word/frame, No companding (Receive)
|
||||||
|
//
|
||||||
|
McbspbRegs.RCR2.all=0x0;
|
||||||
|
McbspbRegs.RCR1.all=0x0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Single-phase frame, 1 word/frame, No companding (Transmit)
|
||||||
|
//
|
||||||
|
McbspbRegs.XCR2.all=0x0;
|
||||||
|
McbspbRegs.XCR1.all=0x0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
|
||||||
|
//
|
||||||
|
McbspbRegs.SRGR2.bit.CLKSM = 1;
|
||||||
|
McbspbRegs.SRGR2.bit.FPER = 31; // FPER = 32 CLKG periods
|
||||||
|
|
||||||
|
McbspbRegs.SRGR1.bit.FWID = 0; // Frame Width = 1 CLKG period
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKG frequency = LSPCLK/(CLKGDV+1)
|
||||||
|
//
|
||||||
|
McbspbRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL;
|
||||||
|
|
||||||
|
//
|
||||||
|
// FSX generated internally, FSR derived from an external source
|
||||||
|
//
|
||||||
|
McbspbRegs.PCR.bit.FSXM = 1;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CLKX generated internally, CLKR derived from an external source
|
||||||
|
//
|
||||||
|
McbspbRegs.PCR.bit.CLKXM = 1;
|
||||||
|
|
||||||
|
delay_loop(); // Wait at least 2 SRG clock cycles
|
||||||
|
McbspbRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
|
||||||
|
clkg_delay_loop(); // Wait at least 2 CLKG cycles
|
||||||
|
McbspbRegs.SPCR2.bit.XRST=1; // Release TX from Reset
|
||||||
|
McbspbRegs.SPCR1.bit.RRST=1; // Release RX from Reset
|
||||||
|
McbspbRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
|
||||||
|
}
|
||||||
|
#endif // end DSP28_MCBSPB
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa8bit - McBSP-A 8-bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa8bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=0; // 8-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=0; // 8-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa12bit - McBSP-A 12 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa12bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=1; // 12-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=1; // 12-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa16bit - McBSP-A 16 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa16bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=2; // 16-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=2; // 16-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa20bit - McBSP-A 20 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa20bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=3; // 20-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=3; // 20-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa24bit - McBSP-A 24 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa24bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=4; // 24-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=4; // 24-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspa32bit - McBSP-A 32 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspa32bit(void)
|
||||||
|
{
|
||||||
|
McbspaRegs.RCR1.bit.RWDLEN1=5; // 32-bit word
|
||||||
|
McbspaRegs.XCR1.bit.XWDLEN1=5; // 32-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// McBSP-B Data Lengths
|
||||||
|
//
|
||||||
|
#if (DSP28_MCBSPB)
|
||||||
|
//
|
||||||
|
// InitMcbspb8bit - McBSP-B 8-bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb8bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=0; // 8-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=0; // 8-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb12bit - McBSP-B 12 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb12bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=1; // 12-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=1; // 12-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb16bit - McBSP-B 16 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb16bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=2; // 16-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=2; // 16-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb20bit - McBSP-B 20 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb20bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=3; // 20-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=3; // 20-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb24bit - McBSP-B 24 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb24bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=4; // 24-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=4; // 24-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspb32bit - McBSP-B 32 bit Length
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspb32bit(void)
|
||||||
|
{
|
||||||
|
McbspbRegs.RCR1.bit.RWDLEN1=5; // 32-bit word
|
||||||
|
McbspbRegs.XCR1.bit.XWDLEN1=5; // 32-bit word
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //end DSP28_MCBSPB
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspGpio -
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspGpio(void)
|
||||||
|
{
|
||||||
|
InitMcbspaGpio();
|
||||||
|
#if DSP28_MCBSPB
|
||||||
|
InitMcbspbGpio();
|
||||||
|
#endif // end DSP28_MCBSPB
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspaGpio - This function initializes GPIO pins to function as McBSP-A
|
||||||
|
//
|
||||||
|
void
|
||||||
|
InitMcbspaGpio(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure McBSP-A pins using GPIO regs
|
||||||
|
// This specifies which of the possible GPIO pins will be McBSP functional
|
||||||
|
// pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 2; // GPIO20 is MDXA pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 2; // GPIO21 is MDRA pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 2; // GPIO22 is MCLKXA pin
|
||||||
|
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 2; // GPIO7 is MCLKRA pin
|
||||||
|
//GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 1; // GPIO58 is MCLKRA pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 2; // GPIO23 is MFSXA pin
|
||||||
|
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2; // GPIO5 is MFSRA pin
|
||||||
|
//GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 1; // GPIO59 is MFSRA pin
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable internal pull-up for the selected pins
|
||||||
|
// Pull-ups can be enabled or disabled by the user.
|
||||||
|
// This will enable the pullups for the specified pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pull-up on GPIO20 (MDXA)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pull-up on GPIO21 (MDRA)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pull-up on GPIO22 (MCLKXA)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pull-up on GPIO7 (MCLKRA)
|
||||||
|
//GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pull-up on GPIO58 (MCLKRA)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pull-up on GPIO23 (MFSXA)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pull-up on GPIO5 (MFSRA)
|
||||||
|
//GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pull-up on GPIO59 (MFSRA)
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set qualification for selected input pins to asynch only
|
||||||
|
// This will select asynch (no qualification) for the selected pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3; // Asynch input GPIO21 (MDRA)
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 3; // Asynch input GPIO22 (MCLKXA)
|
||||||
|
GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 3; // Asynch input GPIO7 (MCLKRA)
|
||||||
|
//GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO58(MCLKRA)
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3; // Asynch input GPIO23 (MFSXA)
|
||||||
|
GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3; // Asynch input GPIO5 (MFSRA)
|
||||||
|
//GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO59 (MFSRA)
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// InitMcbspbGpio - This function initializes GPIO pins to function as McBSP-B
|
||||||
|
//
|
||||||
|
#if DSP28_MCBSPB
|
||||||
|
void
|
||||||
|
InitMcbspbGpio(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure McBSP-A pins using GPIO regs
|
||||||
|
// This specifies which of the possible GPIO pins will be McBSP functional
|
||||||
|
// pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3; // GPIO12 is MDXB pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 3; // GPIO24 is MDXB pin
|
||||||
|
//GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3; // GPIO13 is MDRB pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 3; // GPIO25 is MDRB pin
|
||||||
|
//GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3; // GPIO14 is MCLKXB pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 3; // GPIO26 is MCLKXB pin
|
||||||
|
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 3; // GPIO3 is MCLKRB pin
|
||||||
|
//GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 1; // GPIO60 is MCLKRB pin
|
||||||
|
//GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3; // GPIO15 is MFSXB pin
|
||||||
|
GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 3; // GPIO27 is MFSXB pin
|
||||||
|
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 3; // GPIO1 is MFSRB pin
|
||||||
|
//GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 1; // GPIO61 is MFSRB pin
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable internal pull-up for the selected pins
|
||||||
|
// Pull-ups can be enabled or disabled by the user.
|
||||||
|
// This will enable the pullups for the specified pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; //Enable pull-up on GPIO24 (MDXB)
|
||||||
|
//GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; //Enable pull-up on GPIO12 (MDXB)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; //Enable pull-up on GPIO25 (MDRB)
|
||||||
|
//GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; //Enable pull-up on GPIO13 (MDRB)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; //Enable pull-up on GPIO26 (MCLKXB)
|
||||||
|
//GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; //Enable pull-up on GPIO14 (MCLKXB)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; //Enable pull-up on GPIO3 (MCLKRB)
|
||||||
|
//GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; //Enable pull-up on GPIO60 (MCLKRB)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; //Enable pull-up on GPIO27 (MFSXB)
|
||||||
|
//GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; //Enable pull-up on GPIO15 (MFSXB)
|
||||||
|
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; //Enable pull-up on GPIO1 (MFSRB)
|
||||||
|
//GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; //Enable pull-up on GPIO61 (MFSRB)
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set qualification for selected input pins to asynch only
|
||||||
|
// This will select asynch (no qualification) for the selected pins.
|
||||||
|
// Comment out other unwanted lines.
|
||||||
|
//
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3; // Asynch input GPIO25 (MDRB)
|
||||||
|
//GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (MDRB)
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3; // Asynch input GPIO26(MCLKXB)
|
||||||
|
//GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (MCLKXB)
|
||||||
|
GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3; // Asynch input GPIO3 (MCLKRB)
|
||||||
|
//GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // Asynch input GPIO60 (MCLKRB)
|
||||||
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3; // Asynch input GPIO27 (MFSXB)
|
||||||
|
//GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (MFSXB)
|
||||||
|
GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 3; // Asynch input GPIO1 (MFSRB)
|
||||||
|
//GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3; // Asynch input GPIO61 (MFSRB)
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
#endif // end DSP28_MCBSPB
|
||||||
|
|
||||||
|
//
|
||||||
|
// delay_loop -
|
||||||
|
//
|
||||||
|
void
|
||||||
|
delay_loop(void)
|
||||||
|
{
|
||||||
|
long i;
|
||||||
|
|
||||||
|
//
|
||||||
|
// delay in McBsp init. must be at least 2 SRG cycles
|
||||||
|
//
|
||||||
|
for (i = 0; i < MCBSP_INIT_DELAY; i++)
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// clkg_delay_loop -
|
||||||
|
//
|
||||||
|
void
|
||||||
|
clkg_delay_loop(void)
|
||||||
|
{
|
||||||
|
long i;
|
||||||
|
|
||||||
|
//
|
||||||
|
// delay in McBsp init. must be at least 2 SRG cycles
|
||||||
|
//
|
||||||
|
for (i = 0; i < MCBSP_CLKG_DELAY; i++)
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// End of File
|
||||||
|
//
|
||||||
|
|
||||||
@ -0,0 +1,130 @@
|
|||||||
|
/**********************************************************************
|
||||||
|
* File: F28335_nonBIOS_flash.cmd -- Linker command file for DSP/BIOS
|
||||||
|
* code with DSP in jump-to-flash boot mode.
|
||||||
|
*
|
||||||
|
* History:
|
||||||
|
* 01/20/11 - Deleted unneeded Boot ROM memory definitions. (D. Alter)
|
||||||
|
* 09/18/07 - original (D. Alter)
|
||||||
|
**********************************************************************/
|
||||||
|
#ifndef PROGRAMM_FLASH
|
||||||
|
#define PROGRAMM_FLASH
|
||||||
|
//#undef PROGRAMM_FLASH
|
||||||
|
#endif
|
||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
PAGE 0: /* Program Memory */
|
||||||
|
BEGIN_M0 : origin = 0x000000, length = 0x000002 /* Part of M0SARAM. Used for "Boot to M0" bootloader mode. */
|
||||||
|
RAML0 : origin = 0x008000, length = 0x001000 /* L0 - L3 SARAM combined, CSM secure */
|
||||||
|
L123SARAM : origin = 0x009000, length = 0x003000 /* L0 - L3 SARAM combined, CSM secure */
|
||||||
|
FLASH_H (R) : origin = 0x300000, length = 0x008000 /* On-chip FLASH H*/
|
||||||
|
FLASH_G (R) : origin = 0x308000, length = 0x008000 /* On-chip FLASH H*/
|
||||||
|
FLASH_ABCDEF (R) : origin = 0x310000, length = 0x02FF80 /* On-chip FLASH */
|
||||||
|
CSM_RSVD (R) : origin = 0x33FF80, length = 0x000076 /* Part of FLASH Sector A. Reserved when CSM is in use. */
|
||||||
|
BEGIN_FLASH (R) : origin = 0x33FFF6, length = 0x000002 /* Part of FLASH Sector A. Used for "Jump to flash" bootloader mode. */
|
||||||
|
PASSWORDS (R) : origin = 0x33FFF8, length = 0x000008 /* Part of FLASH Sector A. CSM password locations. */
|
||||||
|
ADC_CAL : origin = 0x380080, length = 0x000009
|
||||||
|
OTP (R) : origin = 0x380400, length = 0x000400 /* OTP */
|
||||||
|
|
||||||
|
IQTABLES (R) : origin = 0x3FE000, length = 0x000B50 /* Part of Boot ROM */
|
||||||
|
IQTABLES2 (R) : origin = 0x3FEB50, length = 0x00008C /* Part of Boot ROM */
|
||||||
|
FPUTABLES (R) : origin = 0x3FEBDC, length = 0x0006A0 /* Part of Boot ROM */
|
||||||
|
|
||||||
|
/* BOOT : origin = 0x3FF34C, length = 0x0006AF */
|
||||||
|
BOOT : origin = 0x3FF27C, length = 0x000D44
|
||||||
|
/* FLASH_API : origin = 0x3FFFB9, length = 0x000001 */
|
||||||
|
/* VERSION : origin = 0x3FFFBA, length = 0x000002 */
|
||||||
|
/* CHECKSUM : origin = 0x3FFFBC, length = 0x000004 */
|
||||||
|
|
||||||
|
RESET (R) : origin = 0x3FFFC0, length = 0x000002 /* part of Boot ROM */
|
||||||
|
|
||||||
|
PAGE 1 : /* Data Memory */
|
||||||
|
M0SARAM : origin = 0x000002, length = 0x0003FE /* M0 SARAM */
|
||||||
|
M1SARAM : origin = 0x000400, length = 0x000400 /* M1 SARAM */
|
||||||
|
DRAML1 (RW) : origin = 0x009000, length = 0x001000
|
||||||
|
L4SARAM : origin = 0x00C000, length = 0x002000 /* L4 SARAM, DMA accessible, 1 WS prog access */
|
||||||
|
/*L5SARAM : origin = 0x00D000, length = 0x001000 /* L5 SARAM, DMA accessible, 1 WS prog access */
|
||||||
|
L6SARAM : origin = 0x00E000, length = 0x001000 /* L6 SARAM, DMA accessible, 1 WS prog access */
|
||||||
|
L7SARAM : origin = 0x00F000, length = 0x001000 /* L7 SARAM, DMA accessible, 1 WS prog access */
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/*** Compiler Required Sections ***/
|
||||||
|
/* Program memory (PAGE 0) sections */
|
||||||
|
.text : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
.cinit : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
.const : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
.econst : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
.pinit : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
.reset : > RESET, PAGE = 0, TYPE = DSECT /* We are not using the .reset section */
|
||||||
|
.switch : > FLASH_ABCDEF, PAGE = 0
|
||||||
|
|
||||||
|
IQmath : load = FLASH_ABCDEF, PAGE = 0
|
||||||
|
IQmathTables : load = IQTABLES, PAGE = 0, TYPE = NOLOAD
|
||||||
|
/*
|
||||||
|
IQmathTables2 > IQTABLES2, type = NOLOAD, PAGE = 1
|
||||||
|
{
|
||||||
|
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
IQmathTablesRam : load = L4SARAM, PAGE = 1
|
||||||
|
|
||||||
|
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
|
||||||
|
|
||||||
|
/* .InitBoot : load = BOOT, PAGE = 0 */
|
||||||
|
/* .Flash : load = FLASH_API PAGE = 0 */
|
||||||
|
/* .Isr : load = BOOT, PAGE = 0 */
|
||||||
|
|
||||||
|
/* Data Memory (PAGE 1) sections */
|
||||||
|
.bss : > L4SARAM, PAGE = 1
|
||||||
|
.ebss : > L4SARAM, PAGE = 1
|
||||||
|
.cio : > L4SARAM, PAGE = 1
|
||||||
|
.stack : > M1SARAM, PAGE = 1
|
||||||
|
.sysmem : > L4SARAM, PAGE = 1
|
||||||
|
.esysmem : > L4SARAM, PAGE = 1
|
||||||
|
|
||||||
|
/*** User Defined Sections ***/
|
||||||
|
codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */
|
||||||
|
csm_rsvd : > CSM_RSVD, PAGE = 0 /* Used by file Passwords.asm */
|
||||||
|
internalMemFuncs : > FLASH_ABCDEF, PAGE = 0 /* Used by file Xintf.c. Link to internal memory */
|
||||||
|
passwords : > PASSWORDS, PAGE = 0 /* Used by file Passwords.asm */
|
||||||
|
secureRamFuncs : LOAD = FLASH_H, PAGE = 0 /* Used by file Flash.c */
|
||||||
|
RUN = RAML0, PAGE = 0 /* Load to flash, run from CSM secure RAM */
|
||||||
|
LOAD_START(_secureRamFuncs_loadstart),
|
||||||
|
LOAD_SIZE(_secureRamFuncs_loadsize),
|
||||||
|
RUN_START(_secureRamFuncs_runstart)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __TI_COMPILER_VERSION__
|
||||||
|
#if __TI_COMPILER_VERSION__ >= 15009000
|
||||||
|
|
||||||
|
.TI.ramfunc : {} LOAD = FLASH_ABCDEF, PAGE = 0 /* Used by file Flash.c */
|
||||||
|
RUN = L123SARAM, PAGE = 0 /* Load to flash, run from CSM secure RAM */
|
||||||
|
LOAD_START(_mainRamFuncs_loadstart),
|
||||||
|
LOAD_SIZE(_mainRamFuncs_loadsize),
|
||||||
|
RUN_START(_mainRamFuncs_runstart)
|
||||||
|
|
||||||
|
#else
|
||||||
|
ramfuncs : LOAD = FLASH_ABCDEF, PAGE = 0 /* Used by file Flash.c */
|
||||||
|
RUN = L123SARAM, PAGE = 0 /* Load to flash, run from CSM secure RAM */
|
||||||
|
LOAD_START(_mainRamFuncs_loadstart),
|
||||||
|
LOAD_SIZE(_mainRamFuncs_loadsize),
|
||||||
|
RUN_START(_mainRamFuncs_runstart)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/* SINTBL : > FLASH_G, PAGE = 0 */
|
||||||
|
|
||||||
|
/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
|
||||||
|
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************* end of file ************************/
|
||||||
@ -1,28 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<configurations XML_version="1.2" id="configurations_0">
|
|
||||||
|
|
||||||
|
|
||||||
<configuration XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" desc="Texas Instruments XDS100v3 USB Debug Probe_0" href="connections/TIXDS100v3_Dot7_Connection.xml" id="Texas Instruments XDS100v3 USB Debug Probe_0" xml="TIXDS100v3_Dot7_Connection.xml" xmlpath="connections"/>
|
|
||||||
|
|
||||||
<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" href="drivers/tixds100v2c28x.xml" id="drivers" xml="tixds100v2c28x.xml" xmlpath="drivers"/>
|
|
||||||
|
|
||||||
<property Type="choicelist" Value="1" id="Emulator Selection">
|
|
||||||
<choice Name="Select by serial number" value="0">
|
|
||||||
<property Type="stringfield" Value="FT57N1L8" id="-- Enter the serial number"/>
|
|
||||||
</choice>
|
|
||||||
</property>
|
|
||||||
<platform XML_version="1.2" id="platform_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" desc="TMS320F28335_0" href="devices/f28335.xml" id="TMS320F28335_0" xml="f28335.xml" xmlpath="devices"/>
|
|
||||||
|
|
||||||
</platform>
|
|
||||||
|
|
||||||
</connection>
|
|
||||||
|
|
||||||
</configuration>
|
|
||||||
|
|
||||||
</configurations>
|
|
||||||
@ -1,28 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<configurations XML_version="1.2" id="configurations_0">
|
|
||||||
|
|
||||||
|
|
||||||
<configuration XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" desc="Texas Instruments XDS100v3 USB Debug Probe_0" href="connections/TIXDS100v3_Dot7_Connection.xml" id="Texas Instruments XDS100v3 USB Debug Probe_0" xml="TIXDS100v3_Dot7_Connection.xml" xmlpath="connections"/>
|
|
||||||
|
|
||||||
<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" href="drivers/tixds100v2c28x.xml" id="drivers" xml="tixds100v2c28x.xml" xmlpath="drivers"/>
|
|
||||||
|
|
||||||
<property Type="choicelist" Value="1" id="Emulator Selection">
|
|
||||||
<choice Name="Select by serial number" value="0">
|
|
||||||
<property Type="stringfield" Value="TI7EZCHI" id="-- Enter the serial number"/>
|
|
||||||
</choice>
|
|
||||||
</property>
|
|
||||||
<platform XML_version="1.2" id="platform_0">
|
|
||||||
|
|
||||||
<instance XML_version="1.2" desc="TMS320F28335_0" href="devices/f28335.xml" id="TMS320F28335_0" xml="f28335.xml" xmlpath="devices"/>
|
|
||||||
|
|
||||||
</platform>
|
|
||||||
|
|
||||||
</connection>
|
|
||||||
|
|
||||||
</configuration>
|
|
||||||
|
|
||||||
</configurations>
|
|
||||||
Loading…
Reference in New Issue