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CCS-COMM_BOARD
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Add interrupt handling when bus error occurs

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Rename private variables
dev
Oleg 7 months ago
parent 18728c7fbc
commit e3653b2d50
6 changed files with 236 additions and 236 deletions
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29
Periphery.cpp
Unescape Escape View File

@ -1,22 +1,17 @@
#include "Periphery.h"
#include "Protocol/CAN.h"
Periphery::Periphery() :
_cana(can_space::CANA),
_digitalIO(),
_zone6_ptr(reinterpret_cast<Uint16*>(0x100000)),
_scib(ScibRegs),
_modbusInitFlag(false),
_modbusRegCounter(0),
modbusRTU(CpuTimer2, _scib)
modbusRTU(CpuTimer2, _scib),
_error(false)
{
_softVersion.DSP = 202;
_softVersion.CPLD = 0;
test_hmi_float_reg_400_test = 0;
test_hmi_float_reg_401_test = 0;
test_hmi_float_reg_402_test = 0;
test_hmi_float_reg_403_test = 0;
test_hmi_float_reg_404_test = 0;
}
@ -28,8 +23,8 @@ void Periphery::config(){
// Data Frame MBOX
_cana.configRxMBox(can_space::MODBUS_SETTINGS_MBOX, can_space::MsgID(0x0), can_space::MsgCtrlReg(0x6)); // Modbus settings
_cana.configTxMBox(can_space::MODBUS_DATA_COMM_TO_CPU_MBOX, can_space::MsgID(0x29), can_space::MsgCtrlReg(0x28)); // Send Modbus data to CPU
_cana.configRxMBox(can_space::MODBUS_DATA_CPU_TO_COMM_MBOX, can_space::MsgID(0x28), can_space::MsgCtrlReg(0x8)); // Receive Modbus data from CPU
_cana.configTxMBox(can_space::MODBUS_DATA_COMM_TO_CPU_MBOX, can_space::MsgID(0x29), can_space::MsgCtrlReg(0x28)); // Send Modbus data to CPU
_cana.configTxMBox(can_space::DIGITAL_INPUT_MBOX, can_space::MsgID(0x30), can_space::MsgCtrlReg(0x2)); // Send DI
_cana.configRxMBox(can_space::DIGITAL_OUTPUT_MBOX, can_space::MsgID(0x31), can_space::MsgCtrlReg(0x2)); // Receive DO
@ -41,7 +36,7 @@ void Periphery::config(){
// Interrupts
_cana.configSystemIsr(can_space::I0EN_ENABLE |
can_space::EPIM_ENABLE | can_space::WLIM_ENABLE | can_space::AAIM_ENABLE);
can_space::EPIM_ENABLE | can_space::WLIM_ENABLE | can_space::WDIM_ENABLE);// | can_space::AAIM_ENABLE);
//--------------------------------------Init XINTF interface----------------------------------------------------------
@ -98,6 +93,7 @@ void Periphery::receiveModbusParameters(){
MODBUSRTU::modbusConfiguration.config.stopbits = static_cast<DSP28335::SCIStopBits>(_message.mdh.byte.BYTE5);
modbusRTU.configure(MODBUSRTU::modbusConfiguration);
// ECanaRegs.CANAA.all = 0xFFFFFFFF;
_modbusRegCounter = 0;
}
}
@ -128,6 +124,8 @@ void Periphery::getModbusConfiguration(){
}
}
}
_cana.disableTimeOutControl(can_space::MODBUS_SETTINGS_MBOX);
// ECanaRegs.CANAA.all = 0xFFFFFFFF;
_cana.receiveMsg(can_space::MODBUS_SETTINGS_MBOX, _message);
MODBUSRTU::modbusConfiguration.node_id = _message.mdl.byte.BYTE0;
@ -170,8 +168,6 @@ void Periphery::sendModbusDataToCPU(){
if(modbusRTU.dataHandler.outputRegisters.address_range(reg.get_address())){
_message.mdl.all = reg.get_address();
reg.read(_message.mdh.all);
_modbusRegCounter++;
}
else {
_modbusRegCounter = 0;
@ -179,9 +175,8 @@ void Periphery::sendModbusDataToCPU(){
_message.mdl.all = reg.get_address();
reg.read(_message.mdh.all);
_modbusRegCounter++;
}
_modbusRegCounter++;
_cana.transmitMsg(can_space::MODBUS_DATA_COMM_TO_CPU_MBOX, _message);
}
@ -199,3 +194,9 @@ void Periphery::receiveCpuModbusData(){
reg.write_data(_message.mdh.all);
}
}
void Periphery::canInterruptHandle(){
_cana.busErrorInterruptFlagsReset();
_error = true;
}

11
Periphery.h
Unescape Escape View File

@ -36,6 +36,8 @@ public:
void sendModbusDataToCPU();
void receiveCpuModbusData();
void canInterruptHandle();
private:
can_space::CAN _cana;
interface::DigitalIO _digitalIO;
@ -45,15 +47,8 @@ private:
SoftwareVersion _softVersion;
can_space::CANMessage _message;
bool _modbusInitFlag;
bool _error;
uint16_t _modbusRegCounter;
float test_hmi_float_reg_400_test;
float test_hmi_float_reg_401_test;
float test_hmi_float_reg_402_test;
float test_hmi_float_reg_403_test;
float test_hmi_float_reg_404_test;
bool _error;
public:
MODBUSRTU::ModbusRTU modbusRTU;

116
Protocol/CAN.cpp
Unescape Escape View File

@ -10,7 +10,7 @@ void CAN::transmitMsg(Uint16 boxNumber, const CANMessage& message, bool writeDat
mboxControl = 1ul << boxNumber;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
p_MailBox->MDH.all = 0x0;
p_MailBox->MDL.all = 0x0;
@ -20,18 +20,18 @@ void CAN::transmitMsg(Uint16 boxNumber, const CANMessage& message, bool writeDat
p_MailBox->MDL.all = message.mdl.all;
// Set TRS for mailbox
CanShadow_.CANTRS.all = 0;
CanShadow_.CANTRS.all |= mboxControl;
p_CanRegs_->CANTRS.all = CanShadow_.CANTRS.all;
_CanShadow.CANTRS.all = 0;
_CanShadow.CANTRS.all |= mboxControl;
_p_CanRegs->CANTRS.all = _CanShadow.CANTRS.all;
// Wait for TA bit to be set
// do { CanShadow_.CANTA.all = p_CanRegs_->CANTA.all; }
// while((CanShadow_.CANTA.all & mboxControl) == 0 );
// do { _CanShadow.CANTA.all = _p_CanRegs->CANTA.all; }
// while((_CanShadow.CANTA.all & mboxControl) == 0 );
// // Clear TA (transmit acknowledge bit)
// CanShadow_.CANTA.all = 0;
// CanShadow_.CANTA.all |= mboxControl;
// p_CanRegs_->CANTA.all = CanShadow_.CANTA.all;
// _CanShadow.CANTA.all = 0;
// _CanShadow.CANTA.all |= mboxControl;
// _p_CanRegs->CANTA.all = _CanShadow.CANTA.all;
}
@ -43,7 +43,7 @@ void CAN::transmitMsg(Uint16 boxNumber, const Uint64& message, const Uint16 dlc)
mboxControl = 1ul << boxNumber;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
p_MailBox->MDH.all = 0x0;
p_MailBox->MDL.all = 0x0;
@ -53,18 +53,18 @@ void CAN::transmitMsg(Uint16 boxNumber, const Uint64& message, const Uint16 dlc)
p_MailBox->MDL.all = message;
// Set TRS for mailbox
CanShadow_.CANTRS.all = 0;
CanShadow_.CANTRS.all |= mboxControl;
p_CanRegs_->CANTRS.all = CanShadow_.CANTRS.all;
_CanShadow.CANTRS.all = 0;
_CanShadow.CANTRS.all |= mboxControl;
_p_CanRegs->CANTRS.all = _CanShadow.CANTRS.all;
// Wait for TA bit to be set
// do { CanShadow_.CANTA.all = p_CanRegs_->CANTA.all; }
// while((CanShadow_.CANTA.all & mboxControl) == 0 );
// do { _CanShadow.CANTA.all = _p_CanRegs->CANTA.all; }
// while((_CanShadow.CANTA.all & mboxControl) == 0 );
// Clear TA (transmit acknowledge bit)
// CanShadow_.CANTA.all = 0;
// CanShadow_.CANTA.all |= mboxControl;
// p_CanRegs_->CANTA.all = CanShadow_.CANTA.all;
// _CanShadow.CANTA.all = 0;
// _CanShadow.CANTA.all |= mboxControl;
// _p_CanRegs->CANTA.all = _CanShadow.CANTA.all;
}
@ -76,7 +76,7 @@ void CAN::transmitMsg(Uint16 boxNumber, const Uint64& message){
mboxControl = 1ul << boxNumber;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
p_MailBox->MDH.all = 0x0;
p_MailBox->MDL.all = 0x0;
@ -85,18 +85,18 @@ void CAN::transmitMsg(Uint16 boxNumber, const Uint64& message){
p_MailBox->MDL.all = message;
// Set TRS for mailbox
CanShadow_.CANTRS.all = 0;
CanShadow_.CANTRS.all |= mboxControl;
p_CanRegs_->CANTRS.all = CanShadow_.CANTRS.all;
_CanShadow.CANTRS.all = 0;
_CanShadow.CANTRS.all |= mboxControl;
_p_CanRegs->CANTRS.all = _CanShadow.CANTRS.all;
// Wait for TA bit to be set
// do { CanShadow_.CANTA.all = p_CanRegs_->CANTA.all; }
// while((CanShadow_.CANTA.all & mboxControl) == 0 );
// do { _CanShadow.CANTA.all = _p_CanRegs->CANTA.all; }
// while((_CanShadow.CANTA.all & mboxControl) == 0 );
// Clear TA (transmit acknowledge bit)
// CanShadow_.CANTA.all = 0;
// CanShadow_.CANTA.all |= mboxControl;
// p_CanRegs_->CANTA.all = CanShadow_.CANTA.all;
// _CanShadow.CANTA.all = 0;
// _CanShadow.CANTA.all |= mboxControl;
// _p_CanRegs->CANTA.all = _CanShadow.CANTA.all;
}
@ -107,18 +107,18 @@ void CAN::updateTXMessage(Uint16 boxNumber, const CANMessage& message){ // TODO
if (boxNumber > 31) return;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
// Set change data request (CDR bit + MBOX number)
p_CanRegs_->CANMC.all |= (128 + boxNumber);
_p_CanRegs->CANMC.all |= (128 + boxNumber);
p_MailBox->MSGCTRL.bit.DLC = message.dataLength;
p_MailBox->MDL.all = message.mdl.all;
p_MailBox->MDH.all = message.mdh.all;
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
CanShadow_.CANMC.bit.CDR = 0;
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
_CanShadow.CANMC.bit.CDR = 0;
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
}
@ -127,27 +127,27 @@ void CAN::sendRemoteRequest(Uint16 boxNumber){
if (boxNumber > 31) return;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
Uint32 mboxControl(0);
mboxControl = 1ul << boxNumber;
// Mailbox disable
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all &= ~(mboxControl);
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all &= ~(mboxControl);
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
p_MailBox->MSGCTRL.bit.RTR = 1;
// Mailbox enable
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all |= mboxControl;
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all |= mboxControl;
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
// Set TRS for mailbox
CanShadow_.CANTRS.all = 0;
CanShadow_.CANTRS.all |= mboxControl;
p_CanRegs_->CANTRS.all = CanShadow_.CANTRS.all;
_CanShadow.CANTRS.all = 0;
_CanShadow.CANTRS.all |= mboxControl;
_p_CanRegs->CANTRS.all = _CanShadow.CANTRS.all;
}
@ -159,12 +159,12 @@ int16 CAN::receiveMsg(Uint16 boxNumber, CANMessage& rxMessage){
mboxControl = 1ul << boxNumber;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
bool isNewMessageInBox = p_CanRegs_->CANRMP.all & mboxControl;
bool isNewMessageInBox = _p_CanRegs->CANRMP.all & mboxControl;
if(!isNewMessageInBox) return -2;
p_CanRegs_->CANRMP.all &= mboxControl;
_p_CanRegs->CANRMP.all &= mboxControl;
rxMessage.dataLength = p_MailBox->MSGCTRL.all;
rxMessage.mdl.all = p_MailBox->MDL.all;
@ -173,8 +173,8 @@ int16 CAN::receiveMsg(Uint16 boxNumber, CANMessage& rxMessage){
bool newMessage;
bool lostMessage;
newMessage = p_CanRegs_->CANRMP.all & mboxControl;
lostMessage = p_CanRegs_->CANRML.all & mboxControl;
newMessage = _p_CanRegs->CANRMP.all & mboxControl;
lostMessage = _p_CanRegs->CANRML.all & mboxControl;
if(newMessage || lostMessage) {
return -3;
@ -186,7 +186,7 @@ int16 CAN::receiveMsg(Uint16 boxNumber, CANMessage& rxMessage){
#pragma CODE_SECTION("ramfuncs");
bool CAN::isNewMessage(){
return static_cast<bool>(p_CanRegs_->CANRMP.all);
return static_cast<bool>(_p_CanRegs->CANRMP.all);
}
@ -197,14 +197,14 @@ bool CAN::isNewMessage(Uint16 boxNumber){
Uint32 mboxControl(0);
mboxControl = 1ul << boxNumber;
bool isNewMessageInBox = p_CanRegs_->CANRMP.all & mboxControl;
bool isNewMessageInBox = _p_CanRegs->CANRMP.all & mboxControl;
return isNewMessageInBox;
}
void CAN::resetTimeStampCounter(){
EALLOW;
p_CanRegs_->CANTSC = 0;
_p_CanRegs->CANTSC = 0;
EDIS;
}
@ -213,7 +213,7 @@ void CAN::setTimeOutValue(Uint16 boxNumber, Uint32 canBitsNumber){
if (boxNumber > 31) { return; }
volatile Uint32* p_MailBox(0);
p_MailBox = &(p_CanMotoRegs_->MOTO0) + boxNumber;
p_MailBox = &(_p_CanMotoRegs->MOTO0) + boxNumber;
*p_MailBox = canBitsNumber;
}
@ -222,7 +222,7 @@ void CAN::setTimeOutValue(Uint16 boxNumber, Uint32 canBitsNumber){
#pragma CODE_SECTION("ramfuncs");
bool CAN::isTimeOut(Uint16 boxNumber){
bool mBOXTimeOut = false;
mBOXTimeOut = p_CanRegs_->CANTOS.all & (1ul << boxNumber);
mBOXTimeOut = _p_CanRegs->CANTOS.all & (1ul << boxNumber);
return mBOXTimeOut;
}
@ -230,7 +230,17 @@ bool CAN::isTimeOut(Uint16 boxNumber){
void CAN::clearTimeOutFlag(Uint16 boxNumber){
Uint32 clearFlag = 0;
clearFlag = 1ul << boxNumber;
p_CanRegs_->CANTOS.all = clearFlag;
_p_CanRegs->CANTOS.all = clearFlag;
}
void CAN::busErrorInterruptFlagsReset(){
_CanShadow.CANGIF0.all = 0;
_CanShadow.CANGIF0.bit.WLIF0 = 1;
_CanShadow.CANGIF0.bit.EPIF0 = 1;
_CanShadow.CANGIF0.bit.WDIF0 = 1;
_p_CanRegs->CANGIF0.all = _CanShadow.CANGIF0.all;
}

14
Protocol/CAN.h
Unescape Escape View File

@ -127,13 +127,15 @@ public:
bool isTimeOut(Uint16 boxNumber);
void clearTimeOutFlag(Uint16 boxNumber);
void busErrorInterruptFlagsReset();
private:
CAN_VARIANT canPort;
volatile ECAN_REGS* p_CanRegs_;
ECAN_REGS CanShadow_;
volatile ECAN_MBOXES* p_CanMBoxes_;
volatile MOTO_REGS* p_CanMotoRegs_;
volatile MOTS_REGS* p_CanMotsRegs_;
CAN_VARIANT _canPort;
volatile ECAN_REGS* _p_CanRegs;
ECAN_REGS _CanShadow;
volatile ECAN_MBOXES* _p_CanMBoxes;
volatile MOTO_REGS* _p_CanMotoRegs;
volatile MOTS_REGS* _p_CanMotsRegs;
};

272
Protocol/CANConfig.cpp
Unescape Escape View File

@ -4,37 +4,37 @@
namespace can_space {
CAN::CAN(CAN_VARIANT canVariant) :
canPort(canVariant),
p_CanRegs_(0),
p_CanMBoxes_(0),
p_CanMotoRegs_(0),
p_CanMotsRegs_(0)
_canPort(canVariant),
_p_CanRegs(0),
_p_CanMBoxes(0),
_p_CanMotoRegs(0),
_p_CanMotsRegs(0)
{}
void CAN::initGpio(){
if(canPort == CANA) InitECanaGpio();
else if (canPort == CANB) InitECanbGpio();
if(_canPort == CANA) InitECanaGpio();
else if (_canPort == CANB) InitECanbGpio();
}
void CAN::config(Uint16 baudrate, Uint16 flags){
if (canPort == CANA){
if (_canPort == CANA){
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ECANAENCLK = 1;
EDIS;
p_CanRegs_ = &ECanaRegs;
p_CanMBoxes_ = &ECanaMboxes;
p_CanMotoRegs_ = &ECanaMOTORegs;
p_CanMotsRegs_ = &ECanaMOTSRegs;
_p_CanRegs = &ECanaRegs;
_p_CanMBoxes = &ECanaMboxes;
_p_CanMotoRegs = &ECanaMOTORegs;
_p_CanMotsRegs = &ECanaMOTSRegs;
}
else if (canPort == CANB){
else if (_canPort == CANB){
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ECANBENCLK = 1;
EDIS;
p_CanRegs_ = &ECanbRegs;
p_CanMBoxes_ = &ECanbMboxes;
p_CanMotoRegs_ = &ECanbMOTORegs;
p_CanMotsRegs_ = &ECanbMOTSRegs;
_p_CanRegs = &ECanbRegs;
_p_CanMBoxes = &ECanbMboxes;
_p_CanMotoRegs = &ECanbMOTORegs;
_p_CanMotsRegs = &ECanbMOTSRegs;
}
else { return; }
@ -47,143 +47,147 @@ void CAN::config(Uint16 baudrate, Uint16 flags){
EALLOW;
// Configure eCAN RX and TX pins for CAN operation using eCAN regs
CanShadow_.CANTIOC.all = p_CanRegs_->CANTIOC.all;
CanShadow_.CANTIOC.bit.TXFUNC = 1;
p_CanRegs_->CANTIOC.all = CanShadow_.CANTIOC.all;
_CanShadow.CANTIOC.all = _p_CanRegs->CANTIOC.all;
_CanShadow.CANTIOC.bit.TXFUNC = 1;
_p_CanRegs->CANTIOC.all = _CanShadow.CANTIOC.all;
CanShadow_.CANRIOC.all = p_CanRegs_->CANRIOC.all;
CanShadow_.CANRIOC.bit.RXFUNC = 1;
p_CanRegs_->CANRIOC.all = CanShadow_.CANRIOC.all;
_CanShadow.CANRIOC.all = _p_CanRegs->CANRIOC.all;
_CanShadow.CANRIOC.bit.RXFUNC = 1;
_p_CanRegs->CANRIOC.all = _CanShadow.CANRIOC.all;
// Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31)
// HECC mode also enables time-stamping feature
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
CanShadow_.CANMC.bit.SCB = 1;
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
_CanShadow.CANMC.bit.SCB = 1;
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
// Initialize all bits of 'Master Control Field' to zero
// Some bits of MSGCTRL register come up in an unknown state. For proper
// operation, all bits (including reserved bits) of MSGCTRL must be
// initialized to zero
p_CanMBoxes_->MBOX0.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX1.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX2.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX3.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX4.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX5.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX6.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX7.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX8.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX9.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX10.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX11.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX12.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX13.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX14.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX15.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX16.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX17.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX18.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX19.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX20.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX21.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX22.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX23.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX24.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX25.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX26.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX27.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX28.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX29.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX30.MSGCTRL.all = 0x00000000;
p_CanMBoxes_->MBOX31.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX0.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX1.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX2.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX3.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX4.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX5.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX6.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX7.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX8.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX9.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX10.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX11.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX12.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX13.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX14.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX15.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX16.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX17.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX18.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX19.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX20.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX21.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX22.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX23.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX24.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX25.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX26.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX27.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX28.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX29.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX30.MSGCTRL.all = 0x00000000;
_p_CanMBoxes->MBOX31.MSGCTRL.all = 0x00000000;
// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.
p_CanRegs_->CANTA.all = 0xFFFFFFFF;
p_CanRegs_->CANRMP.all = 0xFFFFFFFF;
p_CanRegs_->CANGIF0.all = 0xFFFFFFFF;
p_CanRegs_->CANGIF1.all = 0xFFFFFFFF;
_p_CanRegs->CANTA.all = 0xFFFFFFFF;
_p_CanRegs->CANRMP.all = 0xFFFFFFFF;
_p_CanRegs->CANGIF0.all = 0xFFFFFFFF;
_p_CanRegs->CANGIF1.all = 0xFFFFFFFF;
// Configure bit timing parameters for eCANA
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
CanShadow_.CANMC.bit.CCR = 1 ;
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
_CanShadow.CANMC.bit.CCR = 1 ;
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
do { CanShadow_.CANES.all = p_CanRegs_->CANES.all; }
while(CanShadow_.CANES.bit.CCE != 1 );
do { _CanShadow.CANES.all = _p_CanRegs->CANES.all; }
while(_CanShadow.CANES.bit.CCE != 1 );
// MSB - 0; LSB - 1
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
if (flags & MSB_ENABLE){
CanShadow_.CANMC.bit.DBO = 0;
_CanShadow.CANMC.bit.DBO = 0;
}
else
{ CanShadow_.CANMC.bit.DBO = 1; }
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
{ _CanShadow.CANMC.bit.DBO = 1; }
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
CanShadow_.CANBTC.all = 0;
_CanShadow.CANBTC.all = 0;
// The following block for all 150 MHz SYSCLKOUT
// (75 MHz CAN clock) - default. Bit rate = 1 Mbps / 500 kbps / 250 kbps / 100 kbps
switch (baudrate) {
case 1000:
CanShadow_.CANBTC.bit.BRPREG = 4;
CanShadow_.CANBTC.bit.TSEG2REG = 3;
CanShadow_.CANBTC.bit.TSEG1REG = 9;
_CanShadow.CANBTC.bit.BRPREG = 4;
_CanShadow.CANBTC.bit.TSEG2REG = 3;
_CanShadow.CANBTC.bit.TSEG1REG = 9;
break;
case 500:
CanShadow_.CANBTC.bit.BRPREG = 9;
CanShadow_.CANBTC.bit.TSEG2REG = 3;
CanShadow_.CANBTC.bit.TSEG1REG = 9;
_CanShadow.CANBTC.bit.BRPREG = 9;
_CanShadow.CANBTC.bit.TSEG2REG = 3;
_CanShadow.CANBTC.bit.TSEG1REG = 9;
break;
case 250:
CanShadow_.CANBTC.bit.BRPREG = 19;
CanShadow_.CANBTC.bit.TSEG2REG = 3;
CanShadow_.CANBTC.bit.TSEG1REG = 9;
_CanShadow.CANBTC.bit.BRPREG = 19;
_CanShadow.CANBTC.bit.TSEG2REG = 3;
_CanShadow.CANBTC.bit.TSEG1REG = 9;
break;
case 100:
CanShadow_.CANBTC.bit.BRPREG = 49;
CanShadow_.CANBTC.bit.TSEG2REG = 3;
CanShadow_.CANBTC.bit.TSEG1REG = 9;
_CanShadow.CANBTC.bit.BRPREG = 49;
_CanShadow.CANBTC.bit.TSEG2REG = 3;
_CanShadow.CANBTC.bit.TSEG1REG = 9;
break;
default: return;
}
CanShadow_.CANBTC.bit.SAM = 1;
p_CanRegs_->CANBTC.all = CanShadow_.CANBTC.all;
_CanShadow.CANBTC.bit.SAM = 1;
_p_CanRegs->CANBTC.all = _CanShadow.CANBTC.all;
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
CanShadow_.CANMC.bit.CCR = 0 ;
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
_CanShadow.CANMC.bit.CCR = 0 ;
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
do { CanShadow_.CANES.all = p_CanRegs_->CANES.all; }
while(CanShadow_.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared
do { _CanShadow.CANES.all = _p_CanRegs->CANES.all; }
while(_CanShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
_CanShadow.CANMC.bit.ABO = 1;
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
// Disable all Mailboxes
p_CanRegs_->CANME.all = 0;
_p_CanRegs->CANME.all = 0;
// Disable all interrupts
p_CanRegs_->CANGIM.all = 0;
p_CanRegs_->CANMIM.all = 0;
_p_CanRegs->CANGIM.all = 0;
_p_CanRegs->CANMIM.all = 0;
//
// Debug feature
// Configure the eCAN for self test mode.
CanShadow_.CANMC.all = p_CanRegs_->CANMC.all;
_CanShadow.CANMC.all = _p_CanRegs->CANMC.all;
if (flags & STM_ENABLE){
CanShadow_.CANMC.bit.STM = 1;
_CanShadow.CANMC.bit.STM = 1;
}
else
{ CanShadow_.CANMC.bit.STM = 0; }
p_CanRegs_->CANMC.all = CanShadow_.CANMC.all;
{ _CanShadow.CANMC.bit.STM = 0; }
_p_CanRegs->CANMC.all = _CanShadow.CANMC.all;
EDIS;
}
@ -193,41 +197,41 @@ void CAN::configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg
if (boxNumber > 31) return;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
Uint32 mboxControl(0);
mboxControl = 1ul << boxNumber;
// Reset transmittion
if (CanShadow_.CANTRS.all &= mboxControl)
if (_CanShadow.CANTRS.all &= mboxControl)
{
CanShadow_.CANTRR.all = p_CanRegs_->CANTRR.all;
CanShadow_.CANTRR.all |= mboxControl;
p_CanRegs_->CANTRR.all = CanShadow_.CANTRR.all;
do {CanShadow_.CANTRS.all = p_CanRegs_->CANTRS.all;}
while((CanShadow_.CANTRS.all & mboxControl) != 0); // Wait for TRS bit to be cleared
_CanShadow.CANTRR.all = _p_CanRegs->CANTRR.all;
_CanShadow.CANTRR.all |= mboxControl;
_p_CanRegs->CANTRR.all = _CanShadow.CANTRR.all;
do {_CanShadow.CANTRS.all = _p_CanRegs->CANTRS.all;}
while((_CanShadow.CANTRS.all & mboxControl) != 0); // Wait for TRS bit to be cleared
}
// Mailbox disable
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all &= ~(mboxControl);
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all &= ~(mboxControl);
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
// Write to the MSGID field
p_MailBox->MSGID.all = configID.all;
// Mailbox direction - transmit
CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
CanShadow_.CANMD.all &= ~(mboxControl);
p_CanRegs_->CANMD.all = CanShadow_.CANMD.all;
_CanShadow.CANMD.all = _p_CanRegs->CANMD.all;
_CanShadow.CANMD.all &= ~(mboxControl);
_p_CanRegs->CANMD.all = _CanShadow.CANMD.all;
// Config MBOX control reg
p_MailBox->MSGCTRL.all = configCtrlReg.all;
// Mailbox enable
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all |= mboxControl;
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all |= mboxControl;
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
}
@ -235,15 +239,15 @@ void CAN::configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg
if (boxNumber > 31) return;
volatile MBOX* p_MailBox(0);
p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber;
p_MailBox = &(_p_CanMBoxes->MBOX0) + boxNumber;
Uint32 mboxControl(0);
mboxControl = 1ul << boxNumber;
// Mailbox disable
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all &= ~(mboxControl);
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all &= ~(mboxControl);
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
// Write to the MSGID field
p_MailBox->MSGID.all = 0x0;
@ -254,28 +258,28 @@ void CAN::configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg
p_MailBox->MSGCTRL.bit.RTR = configCtrlReg.bit.RTR;
// Configure Mailbox under test as a Receive mailbox
CanShadow_.CANMD.all = p_CanRegs_->CANMD.all;
CanShadow_.CANMD.all |= mboxControl;
p_CanRegs_->CANMD.all = CanShadow_.CANMD.all;
_CanShadow.CANMD.all = _p_CanRegs->CANMD.all;
_CanShadow.CANMD.all |= mboxControl;
_p_CanRegs->CANMD.all = _CanShadow.CANMD.all;
// Overwrite protection
// If "ON" make sure that an additional mailbox is configured to store ’overflow’ messages.
if(configCtrlReg.bit.OPC){
CanShadow_.CANOPC.all = p_CanRegs_->CANOPC.all;
CanShadow_.CANOPC.all |= mboxControl;
p_CanRegs_->CANOPC.all = CanShadow_.CANOPC.all;
_CanShadow.CANOPC.all = _p_CanRegs->CANOPC.all;
_CanShadow.CANOPC.all |= mboxControl;
_p_CanRegs->CANOPC.all = _CanShadow.CANOPC.all;
}
// Enable Mailbox
CanShadow_.CANME.all = p_CanRegs_->CANME.all;
CanShadow_.CANME.all |= mboxControl;
p_CanRegs_->CANME.all = CanShadow_.CANME.all;
_CanShadow.CANME.all = _p_CanRegs->CANME.all;
_CanShadow.CANME.all |= mboxControl;
_p_CanRegs->CANME.all = _CanShadow.CANME.all;
}
void CAN::configSystemIsr(Uint32 flags){
EALLOW;
p_CanRegs_->CANGIM.all = flags;
_p_CanRegs->CANGIM.all = flags;
EDIS;
}
@ -287,8 +291,8 @@ void CAN::configMBoxIsr(Uint16 boxNumber){
mboxControl = 1ul << boxNumber;
EALLOW;
p_CanRegs_->CANMIL.all |= mboxControl;
p_CanRegs_->CANMIM.all |= mboxControl;
_p_CanRegs->CANMIL.all |= mboxControl;
_p_CanRegs->CANMIM.all |= mboxControl;
EDIS;
}
@ -298,9 +302,9 @@ void CAN::enableTimeOutControl(Uint16 boxNumber){
Uint32 mboxControl(0);
mboxControl = p_CanRegs_->CANTOC.all;
mboxControl = _p_CanRegs->CANTOC.all;
mboxControl |= 1ul << boxNumber;
p_CanRegs_->CANTOC.all = mboxControl;
_p_CanRegs->CANTOC.all = mboxControl;
}
@ -309,9 +313,9 @@ void CAN::disableTimeOutControl(Uint16 boxNumber){
Uint32 mboxControl(0);
mboxControl = p_CanRegs_->CANTOC.all;
mboxControl = _p_CanRegs->CANTOC.all;
mboxControl &= ~(1ul << boxNumber);
p_CanRegs_->CANTOC.all = mboxControl;
_p_CanRegs->CANTOC.all = mboxControl;
}

30
main.cpp
Unescape Escape View File

@ -22,8 +22,8 @@ void idle_loop(void);
interrupt void cpu_timer0_isr(void);
interrupt void cpu_timer1_isr(void);
interrupt void canb_isr(void);
interrupt void canb_box_isr(void);
interrupt void cana_isr(void);
interrupt void cana_box_isr(void);
Periphery periphery;
@ -61,8 +61,8 @@ void main()
EALLOW;
PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.XINT13 = &cpu_timer1_isr;
PieVectTable.ECAN0INTB = &canb_isr;
PieVectTable.ECAN1INTB = &canb_box_isr;
PieVectTable.ECAN0INTA = &cana_isr;
PieVectTable.ECAN1INTA = &cana_box_isr;
EDIS;
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
@ -76,8 +76,8 @@ void main()
IER |= M_INT13; // Enable CPU Interrupt 13
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
PieCtrlRegs.PIEIER9.bit.INTx7 = 1; // from 5 to 8
PieCtrlRegs.PIEIER9.bit.INTx8 = 1;
PieCtrlRegs.PIEIER9.bit.INTx5 = 1; // from 5 to 8
PieCtrlRegs.PIEIER9.bit.INTx6 = 1;
periphery.config();
periphery.updateVersionFPGA();
@ -131,27 +131,15 @@ interrupt void cpu_timer1_isr(){
}
interrupt void canb_isr(void){
interrupt void cana_isr(void){
canISRcounter++;
CANGIF0_REG CANGIF0_SHADOW;
volatile Uint32 resetBit;
CANGIF0_SHADOW.all = ECanbRegs.CANGIF0.all;
if (CANGIF0_SHADOW.bit.WLIF0){
resetBit = 256;
ECanbRegs.CANGIF0.all = 256ul;
}
if (CANGIF0_SHADOW.bit.EPIF0){
ECanbRegs.CANGIF0.all = 528ul;
}
periphery.canInterruptHandle();
PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;
}
interrupt void canb_box_isr(void){
interrupt void cana_box_isr(void){
canBoxISRcounter++;
// Just example

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